Harish Vijayakumar

Portrait of Harish Vijayakumar

MY BACKGROUND

I'm a computer engineering student at Georgia Tech focused on RTL design, FPGA development, and computer architecture. I'm working toward becoming a highly skilled chip-design engineer with a strong understanding of the complete tape-out process—from RTL and verification through physical implementation.

BEYOND ENGINEERING

Outside engineering, I love playing sports, traveling, and discovering new experiences. I like changes in my environment, and I value meeting new people/learning from different perspectives.

A custom desktop PC during assembly

WHERE IT STARTED

I built my first desktop with my father when I was around eight years old - an Intel Core i5-4670K system with an NVIDIA GeForce GTX 750 Ti. I started because I wanted better frame rates in video games, but I quickly became more interested in how the computer worked. Since then, I've helped friends and family assemble, upgrade, and repair desktops, handheld devices, and other hardware.

Skills

Tools and subjects I use across coursework, research, and personal projects.

  • SystemVerilog
  • Verilog
  • VHDL
  • RTL Design
  • FPGA Design
  • Computer Architecture
  • ModelSim
  • Cadence Xcelium
  • Intel Quartus Prime
  • Waveform Debugging
  • RTL Verification
  • Digital Logic Design
  • Finite State Machines
  • UART
  • FIFO Design
  • ASIC Physical Design
  • Cadence Innovus
  • PC Assembly & Troubleshooting

Experience

vehicle intelligence

RevSync

Lead Hardware Engineer

Visit RevSync

RevSync is developing a modular vehicle-intelligence platform that brings together telemetry, sensors, vehicle data, and real-time driver coaching.

I'm supporting the team during its early business-development stage by helping present at Georgia Tech CREATE-X and create hardware requirements, platform choices, and designs.

Selected projects

FPGA COMMUNICATION

UART Communication & DSP Platform

A modular SystemVerilog platform integrating UART communication, FIFO buffering, command parsing, multi-character response control, and DSP visualization.

Technical focus

SystemVerilog · Intel MAX 10 · ModelSim · Quartus Prime · CP2102

COMPUTER ARCHITECTURE

8-Bit CPU in SystemVerilog

A modular processor featuring an ALU, four-register file, instruction decoder, program counter, instruction memory, and multi-stage control FSM.

Technical focus

SystemVerilog · RTL Design · FPGA · ALU · Register File

ASIC DESIGN FLOW

Digital Calculator Chip Design

A 64-bit arithmetic controller implemented in SystemVerilog and verified through Cadence simulation and physical-design tools.

Technical focus

SystemVerilog · Cadence Xcelium · SimVision · Cadence Innovus · ASIC Design

Published Research

IEEE Frontiers in Education Conference · 2025

Survey Instruments Used to Study Mental Health Among STEM Graduate Students

A systematic examination of survey instruments used to study mental health among graduate students in STEM disciplines.

ASEE Annual Conference · 2026

Photoelicitation and Coping Strategies Among First-Generation and Low-SES Engineering Students

Research examining coping strategies and academic experiences among first-generation and low-socioeconomic-status engineering students.

PC builds

Harish's personal Ryzen 7 and RTX 3060 desktop with red internal lighting

Personal Gaming and Engineering Workstation

AMD Ryzen 7 5700X · NVIDIA GeForce RTX 3060 · 32GB Corsair Vengeance

Friend's Intel Core i7 and RTX 3070 Founders Edition gaming desktop

RTX 3070 Gaming Build

Intel Core i7-9700K · NVIDIA GeForce RTX 3070 Founders Edition · 32GB G.Skill Trident

Mini-ITX build showing the Ryzen processor cooling and compact internal layout

Compact Mini-ITX Gaming Build

AMD Ryzen 5 3600 · AMD Radeon RX 6600 XT · 16GB

Other builds and assembly work

Browse compact systems, cooling layouts, component installations, and works in progress.

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